Freescale Semiconductor /MK24F12 /MCM /CR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (00)SRAMUAP 0 (SRAMUWP)SRAMUWP 0 (00)SRAMLAP 0 (SRAMLWP)SRAMLWP

SRAMUAP=00, SRAMLAP=00

Description

Control Register

Fields

SRAMUAP

SRAM_U arbitration priority

0 (00): Round robin

1 (01): Special round robin (favors SRAM backoor accesses over the processor)

2 (10): Fixed priority. Processor has highest, backdoor has lowest

3 (11): Fixed priority. Backdoor has highest, processor has lowest

SRAMUWP

SRAM_U write protect

SRAMLAP

SRAM_L arbitration priority

0 (00): Round robin

1 (01): Special round robin (favors SRAM backoor accesses over the processor)

2 (10): Fixed priority. Processor has highest, backdoor has lowest

3 (11): Fixed priority. Backdoor has highest, processor has lowest

SRAMLWP

SRAM_L Write Protect

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